元器件交易网www.cecb2b.comPhilips SemiconductorsProduct specificationDual 4-input multiplexer74LV153FEATURESDESCRIPTION•Optimized for low voltage applications: 1.0 to 3.6 VThe 74LV153 is a low-voltage CMOS device that is pin and function•compatible with 74HC/HCT153.Accepts TTL input levels between VCC = 2.7 V and VCC = 3.6 V•The 74LV153 is a dual 4-input multiplexer which selects 2 bits ofTypical VOLP (output ground bounce) < 0.8 V at VCC = 3.3 V, data from up to four sources selected by common data select inputsTamb = 25°C(S•0, S1). The two 4-input multiplexer circuits have individual activeTypical VOHV (output VOH undershoot) > 2 V at VCC = 3.3 V, LOW output enable inputs (1E, 2E) which can be used to strobe theTamb = 25°Coutputs independently. The outputs (1Y, 2Y) are forced LOW when•Non-inverting outputsthe corresponding output enable inputs are HIGH. The 74LV153 isthe logic implementation of a 2-pole, 4-position switch, where the•Separate enable for each outputposition of the switch, is determined by the logic levels applied to S0•Common select inputsand S1. The logic equations for the outputs are:1Y=1E.(1l•0.S1.S0+1l1.S1.S0+1l2.S1.S0+1l3.S1.S0)Permits multiplexing from n lines to 1 line2Y=2E.(2l0.S1.S0+2l1.S1.S0+2l2.S1.S0+2l3.S1.S0)•Enable line provided for cascading (n lines to 1 line)The 74LV153 can be used to move data to a common output bus•Output capability: standardfrom a group of registers. The state of the select inputs woulddetermine the particular register from which the data came. An•ICC category: MSIalternative application is a function generator. The device cangenerate two functions or three variables. This is useful forimplementing highly irregular random logic.QUICK REFERENCE DATAGND = 0 V; Tamb = 25°C; tr = tf ≤ 2.5 nsSYMBOLPARAMETERCONDITIONSTYPICALUNITPropagation delaytPHL/tPLH1ln, 2ln to nYC14Sn to nYVL = 15 pF;nE to nYCC = 3.3 V14ns10CIInput capacitance3.5pFCPDPower dissipation capacitance per gateVI = GND to VCC130pFNOTE:1.CPD is used to determine the dynamic power dissipation (P × fD in µW)PD = CPD × VCC2 × fi )ȍ (CL × VCC2o) where:fi = input frequency in MHz; CL = output load capacitance in pF;fȍo = output frequency in MHz; V (C × VCC = supply voltage in V;LCC2 × fo) = sum of the outputs.ORDERING INFORMATIONPACKAGESTEMPERATURE RANGEOUTSIDE NORTH AMERICANORTH AMERICAPKG. DWG. #16-Pin Plastic DIL–40°C to +125°C74LV153 N74LV153 NSOT38-416-Pin Plastic SO–40°C to +125°C74LV153 D74LV153 DSOT109-116-Pin Plastic SSOP Type II–40°C to +125°C74LV153 DB74LV153 DBSOT338-116-Pin PlasticTSSOP Type I–40°C to +125°C74LV153 PW74LV153PW DHSOT403-11998 Apr 282853–1921 19309元器件交易网www.cecb2b.comPhilips SemiconductorsDual 4-input multiplexerPIN CONFIGURATION1E116VCCS12152E1I3314S01I24132I31I15122I21I06112I11Y7102I0GND892YSV00538PIN DESCRIPTIONPINNUMBERSYMBOLFUNCTION1, 151E, 2EOutput enable inputs (active LOW)14, 2S0, S1Common data select inputs6, 5, 4, 31l0 to 1l3Data inputs from source 171YMultiplexer output from source 18GNDGround (0 V)92YMultiplexer output from source 210, 11, 12, 132l0 to 2l3Data inputs from source 216VCCPositive supply voltageLOGIC SYMBOL6543101112131l01l11l21302l02l12l22l314S02S111E152E1Y2Y79SV005371998 Apr 283Product specification74LV153LOGIC SYMBOL (IEEE/IEC)1402G0131EN4MUX605147423315101191213SV00539FUNCTIONAL DIAGRAM161I01E51I141I2MUX1Y731I314S02S1102I0112I1122I2MUX2Y9132I32E15SV00540元器件交易网www.cecb2b.comPhilips SemiconductorsProduct specificationDual 4-input multiplexer74LV153LOGIC DIAGRAM1E1I31I21I11I0S0S12I32I22I12I02E1Y2YSV00541FUNCTION TABLESELECT INPUTSDATA INPUTSOUTPUT ENABLEOUTPUTS0S1nl0nl1nl2nl3nEnYXXXXXXHLLLLXXXLLLLHXXXLHHLXLXXLLHLXHXXLHLHXXLXLLLHXXHXLHHHXXXLLLHHXXXHLHNOTES:H=HIGH voltage levelL=LOW voltage levelX=don’t care1998 Apr 284元器件交易网www.cecb2b.comPhilips SemiconductorsProduct specificationDual 4-input multiplexer74LV153RECOMMENDED OPERATING CONDITIONSSYMBOLPARAMETERCONDITIONSMINTYPMAXUNITVCCDC supply voltageSee Note 11.03.33.6VVIInput voltage0–VCCVVOOutput voltage0–VCCVTambOperating ambient temperature range in free airSee DC and AC–40+85characteristics–40+125°CV––500tr, tfInput rise and fall timesVCC = 1.0V to 2.0V––200ns/VVCC = 2.0V to 2.7VCC = 2.7V to 3.6V––100NOTE:1.The LV is guaranteed to function down to VCC = 1.0V (input levels GND or VCC); DC characteristics are guaranteed from VCC = 1.2V to VCC = 3.6V.ABSOLUTE MAXIMUM RATINGS1, 2In accordance with the Absolute Maximum Rating System (IEC 134).Voltages are referenced to GND (ground = 0 V).SYMBOLPARAMETERCONDITIONSRATINGUNITVCCDC supply voltage–0.5 to +4.6V\"IIKDC input diode currentVI < –0.5 or VI > VCC + 0.5V20mA\"IOKDC output diode currentVO < –0.5 or VO > VCC + 0.5V50mA\"IODC output source or sink current– standard outputs–0.5V < VO < VCC + 0.5V25mA\"IGND,DC VCC or GND current for types with\"ICC– standard outputs50mATstgStorage temperature range–65 to +150°CPower dissipation per packagefor temperature range: –40 to +125°CPTOT– plastic DILabove +70°C derate linearly with 12 mW/K750– plastic mini-pack (SO)above +70°C derate linearly with 8 mW/K500mW– plastic shrink mini-pack (SSOP and TSSOP)above +60°C derate linearly with 5.5 mW/K400NOTES:1.Stresses beyond those listed may cause permanent damage to the device. These are stress ratings only and functional operation of thedevice at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure toabsolute-maximum-rated conditions for extended periods may affect device reliability.2.The input and output voltage ratings may be exceeded if the input and output current ratings are observed.1998 Apr 285元器件交易网www.cecb2b.comPhilips SemiconductorsProduct specificationDual 4-input multiplexer74LV153DC ELECTRICAL CHARACTERISTICSOver recommended operating conditions. Voltages are referenced to GND (ground = 0 V).LIMITSSYMBOLPARAMETERTEST CONDITIONS-40°C to +85°C -40°C to +125°CUNITMINTYP1MAXMINMAXVCC = 1.2 V0.90.9VIHHIGH level InputHIGHllItvoltageVCC = 2.0 V1.41.4VVCC = 2.7 to 3.6 V2.02.0V = 1.2 V0.30.3VILLOW level InputLOWllItCCvoltageVCC = 2.0 V0.60.6VVCC = 2.7 to 3.6 V0.80.8VCC = 1.2 V; VI = VIH or VIL; –IO = 100µA1.2VVCC = 2.0 V; VI = VIH or VIL; –IO = 100µA1.82.01.8OHOHIGH level outputvoltage; all outputsVCC = 2.7 V; VI = VIH or VIL; –IO = 100µA2.52.72.5VVCC = 3.0 V; VI = VIH or VIL; –IO = 100µA2.83.02.8HIGH level outputVOHvoltage;STANDARDVCC = 3.0 V; VI = VIH or VIL; –IO = 6mA2.402.822.20VoutputsVCC = 1.2 V; VI = VIH or VIL; IO = 100µA0VVCC = 2.0 V; VI = VIH or VIL; IO = 100µA00.20.2OLOLOW level outputvoltage; all outputsVCC = 2.7 V; VI = VIH or VIL; IO = 100µA00.20.2VVCC = 3.0 V; VI = VIH or VIL; IO = 100µA00.20.2LOW level outputVOLvoltage;STANDARDVCC = 3.0 V; VI = VIH or VIL; IO = 6mA0.250.400.50VoutputsIIInput leakagecurrentVCC = 3.6 V; VI = VCC or GND1.01.0µAICCQuiescent supplycurrent; MSIVCC = 3.6 V; VI = VCC or GND; IO = 020.0160µAAdditional∆ICCquiescent supplyVcurrent per inputCC = 2.7 V to 3.6 V; VI = VCC – 0.6 V500850µANOTE:1.All typical values are measured at Tamb = 25°C.1998 Apr 286元器件交易网www.cecb2b.comPhilips SemiconductorsProduct specificationDual 4-input multiplexer74LV153AC CHARACTERISTICSGND = 0V; tr = tf = 2.5ns; CL = 50pF; RL =KΩLIMITSSYMBOLPARAMETERWAVEFORMCONDITION–40 to +85 °C–40 to +125 °CUNITVCC(V)MINTYP1MAXMINMAX1.285Propagation delayt295666PHL/tPLH1ln to nY;tonY;FiguresFigures 1, 2122.02ln to nY2.7214149ns3.0 to 3.616233391.290t315870PHL/tPLHPropagation delaygySn to nYFiguresFigures 1, 2122.02.7234351ns3.0 to 3.617234411.260tPHL/tPLHPropagation delaygy203946nE to nYFiguresFigures 1, 2122.02.7152934ns3.0 to 3.61122327NOTES:1.Unless otherwise stated, all typical values are measured at TTypical values are measured at Vamb = 25°C2.CC = 3.3 V.AC WAVEFORMSTEST CIRCUITVM = 1.5 V at VCC ≥ 2.7 V;VM = 0.5 V × VCC at VCC < 2.7 V;VCCVOL and VOH are the typical output voltage drop that occur with theoutput load.VIVIVOPULSE1In, 2InGENERATORD.U.T.INPUTVMR50pFTCGNDLRL = 1ktPHLtPLHVOHTest Circuit for switching timesnY OUTPUTVMDEFINITIONSVOLRL = Load resistorCSV00542L = Load capacitance includes jig and probe capacitanceRT = Termination resistance should be equal to ZOUT of pulse generators.Figure 1.Input (1ln, 2ln) to output (1Y, 2Y)propagation delays.TESTVCCVItPLH/tPHL<2.7VVCCVI2.7–3.6V2.7VSn, nEVINPUTMSV00901Figure 3.Load circuitry for switching times.GNDtPHLtPLHVOHnY OUTPUTVMVOLSV00543Figure 2.Select input (S0, S1) and the output enable input (E)to output (nYn) propagation delays.1998 Apr 287元器件交易网www.cecb2b.com
Philips Semiconductors
Product specification
Dual 4-input multiplexer74LV153
DIP16:plastic dual in-line package; 16 leads (300 mil)SOT38-4
1998 Apr 288
元器件交易网www.cecb2b.com
Philips Semiconductors
Product specification
Dual 4-input multiplexer74LV153
SO16:plastic small outline package; 16 leads; body width 3.9 mmSOT109-1
1998 Apr 289
元器件交易网www.cecb2b.com
Philips Semiconductors
Product specification
Dual 4-input multiplexer74LV153
SSOP16:plastic shrink small outline package; 16 leads; body width 5.3 mmSOT338-1
1998 Apr 2810
元器件交易网www.cecb2b.com
Philips Semiconductors
Product specification
Dual 4-input multiplexer74LV153
TSSOP16:plastic thin shrink small outline package; 16 leads; body width 4.4 mmSOT403-1
1998 Apr 2811
元器件交易网www.cecb2b.com
Philips Semiconductors
Dual 4-input multiplexer1998 Apr 28Product specification
74LV153
NOTES
12
元器件交易网www.cecb2b.com
Philips Semiconductors
Dual 4-input multiplexer1998 Apr 28Product specification
74LV153
NOTES
13
元器件交易网www.cecb2b.com
Philips Semiconductors
Product specification
Dual 4-input multiplexer74LV153
DEFINITIONS
Data Sheet Identification
Objective SpecificationProduct Status
Formative or in Design
Definition
This data sheet contains the design target or goal specifications for product development. Specificationsmay change in any manner without notice.
This data sheet contains preliminary data, and supplementary data will be published at a later date. PhilipsSemiconductors reserves the right to make changes at any time without notice in order to improve designand supply the best possible product.
This data sheet contains Final Specifications. Philips Semiconductors reserves the right to make changesat any time without notice, in order to improve design and supply the best possible product.
Preliminary SpecificationPreproduction Product
Product SpecificationFull Production
Philips Semiconductors and Philips Electronics North America Corporation reserve the right to make changes, without notice, in the products,including circuits, standard cells, and/or software, described or contained herein in order to improve design and/or performance. PhilipsSemiconductors assumes no responsibility or liability for the use of any of these products, conveys no license or title under any patent, copyright,or mask work right to these products, and makes no representations or warranties that these products are free from patent, copyright, or maskwork right infringement, unless otherwise specified. Applications that are described herein for any of these products are for illustrative purposesonly. Philips Semiconductors makes no representation or warranty that such applications will be suitable for the specified use without further testingor modification.
LIFE SUPPORT APPLICATIONS
Philips Semiconductors and Philips Electronics North America Corporation Products are not designed for use in life support appliances, devices,or systems where malfunction of a Philips Semiconductors and Philips Electronics North America Corporation Product can reasonably be expectedto result in a personal injury. Philips Semiconductors and Philips Electronics North America Corporation customers using or selling PhilipsSemiconductors and Philips Electronics North America Corporation Products for use in such applications do so at their own risk and agree to fullyindemnify Philips Semiconductors and Philips Electronics North America Corporation for any damages resulting from such improper use or sale.Philips Semiconductors811 East Arques AvenueP.O. Box 3409
Sunnyvale, California 94088–3409Telephone 800-234-7381
© Copyright Philips Electronics North America Corporation 1998
All rights reserved. Printed in U.S.A.
print code
Document order number:Date of release: 05-96
9397-750-04425PhilipsSemiconductors1998 Apr 2814
因篇幅问题不能全部显示，请点此查看更多更全内容